Design of current sources for load common mode optimization

Electrical Bioimpedance Spectroscopy (EBIS) is a technique to assess passive electrical properties of a biological material [1]. It can be invasive, non-invasive or a combination of both. To measure the bioimpedance, it is injected an electrical signal and acquired the biological material electrical response. There are many applications of EBIS, and a lot of them involve the diagnosis of diseases such as skin cancer [2], pressure ulcer [3] and brain cellular edema [4]. Highly precise instruments for both signal generation and acquisitions are essential to have accurate diagnosis.

In practice, many EBIS systems use a current source to excite the biological material instead of a voltage source. In this case, the voltage across the load is measured and the impedance is calculated. This means that the higher the injected current, the higher the measured voltage, and consequently, the higher the signal to noise ratio. Therefore, it is essential to have a current source that can deliver a fixed amplitude current over all frequency range, assuring maximum resolution [5]. Moreover, the output current amplitude can easily be designed to meet medical safety that is usually adopted by researchers as 1 mA.

On the other hand, practical current sources have shown worse high frequency performance in comparison to voltage excitation systems [6,78]. This can be explained by the decrease in the open loop gain of the amplifier and stray capacitances at the circuit, which degrades the overall output impedance as frequency increases [9]. Researchers are trying to create or modify circuits to develop a current source that can work in a wider frequency range.

In bioimpedance applications most systems use a voltage controlled current source (VCCS), usually the enhanced Howland current source (EHCS), because it has shown to be very simple and robust [10]. A few modifications have been proposed to this circuit such as: Mirrored [11] and Bridge [12] configurations, Load-in-the-loop [13], NIC [14] and GIC [15] output stages, high frequency compensations such as Lead-Lag circuits [10], and by using differential amplifiers as the active components [16]. However, most of these improvements focus in the output impedance and bandwidth flatness, leaving characteristics like swing and load common mode voltage aside.

The total impedance seen by the current source is two times the electrode impedance plus the tissue impedance, which is unknown. Thus, higher load capability leads to broader range of applications. Further, if a common mode voltage is generated across the load, artifacts can be generated in the measurement, leading to errors [17], especially in high frequency, where the CMRR of the instrumentation amplifiers decay significantly.

Another commonly ignored issue is the electrode polarization that happens mainly in inert metallic materials (stainless steel, gold and platinum) but also in graphite and a few organic materials [16, 18]. The electrode polarization is a result of the double layer developed at the electrode-electrolyte interface.

In order to solve or attenuate some of the problems mentioned above researchers used symmetrical output current sources. Pliquett et al developed a variation of the Enhanced Howland Current Source [EHCS] based on fully-differential amplifiers to be used with microelectrodes [16]. Liu et al developed a Howland Current Source with an auxiliary circuit that copies the voltage in one side of the load to the other one, the application intended was Electrical Impedance Tomography [EIT] [17]. Recently, Zhang et al developed a Mirrored Current Source using the IC AD844 (current-conveyor) to reduce analog common mode signals and digital common mode noise [19]. Due to low voltage power supply and relatively high current along with high interface electrode-interface impedance caused by effects like fibrosis, Lamlih et al developed an integrated differential current source to maximize the voltage output swing [20].

Swing and load common mode voltage of Howland current sources are analyzed in this work. Comparisons between different topologies are made in simulations. Finally, three new circuits are proposed based on differential amplifiers. Equations, simulations and implementation results are presented to validate the new topologies.

The Howland current sources are split in three groups: non-differential, mirrored and proposed. The Theory Section presents the analytical study of load common mode voltage for each topology.

The three proposed circuits are explained and then modelled. All the equations were obtained using wxMaxima. The equations define the output current, the output impedance and the maximum load as function of the amplifier output saturation voltage.

The circuits are simulated with Orcad Pspice, the simulations are done in the frequency domain (Bode plot) to observe the AC response, and in the time domain to observe the waveform. The AD8132 spice model was obtained from the manufacturer web page and was used in all simulations. The simulated data is plotted and compared to the equations in MATLAB.

All proposed circuits are implemented in a two layer PCB, the operational amplifier used is the AD8132 and all resistors have 1% of tolerance (trough-hole components). The common mode input pin of the AD8132 can be used to reduce the common mode voltage between the outputs, but in this work, it was grounded so it would not influence the circuit performance, hence the proposed circuits can be reproduced with other differential amplifiers that do not have this pin. Furthermore, Pliquett et al also grounded this pin [18].

The signal is generated with a Tektronix function generator (model AFG 3251) and measured with a Tektronix oscilloscope (model MSO 4034).

The input frequency is varied from 100 Hz to 1 MHz. The loads used are four resistors of 100 Ω, 995 Ω, 2492 Ω and 4692 Ω. Although the bioimpedance may vary from a few Ω to hundreds of kΩ depending on the material under test and the electrode used, it is believed that the load range used is enough to demonstrate the objective of this work, whereas other works have used close values [9, 13, 19, 21, 22].

The data of the two voltages across the load and the input voltage are saved from the oscilloscope and exported to MATLAB, where the Fast Fourier Transform (FFT) algorithm is applied to the signals and the output current magnitude, phase and load common mode voltage are calculated.

The enhanced Howland current source (EHCS), shown in Fig. 1, is a voltage controlled current source (VCCS), where the output current (I_out), as a function of the input voltage (V_in), is given by the equation 1.

Fig.1

Many modifications have been proposed to this circuit to enhance some of its characteristics, such as output current bandwidth, output impedance, output swing and common mode current.

The voltage across the load has a differential and common mode component. The differential one affects the output swing capability, while the common mode affects the quality of the measurement.

The common mode rejection ratio (CMRR) is the relation between the differential and the common-mode parts of the signal, usually expressed in dB.

To investigate the load voltage on different topologies of Howland current sources, they were split into 3 groups: non-differential, mirrored, and proposed. Each one will be discussed individually in the following subsections.

Non-differential Group

The non-differential group includes the Howland current sources that have only one current output. One side is called the current side and the other voltage side. It can be single (EHCS), where the voltage side is connected to the ground, or floating (EHCS-BRIDGE1, EHCS-BRIDGE2, EHCS-DIFFERENTIAL).

The EHCS, shown in Fig. 1, has one side of the load grounded, thus completely concentrating load voltage on the node V_L- (see Fig. 1). This requires that the entire voltage drop on the load be provided by the current source, limited by the EHCS compliance.

If the other node of the load is connected to an inverted copy of the voltage V_L-, instead of ground, the EHCS will need to yield only half of the load voltage drop (see Eq. 2 and 3), thus improving the overall compliance. This result can be achieved by a differential approach.

(2)Vload=VL−−(−VL−)=2VL−$${{V}_{load}}\,=\,{{V}_{L-}}\,-\,\left( -{{V}_{L-}} \right)=2{{V}_{L-}}$$(3)VL−=Vload2$${{V}_{L-}}\,=\frac{{{V}_{load}}}{2}$$

Equation 4 describes the common mode signal in function of the voltage on the negative (V_L-) and positive (V_L+) nodes of the load on an arbitrary current source. Common mode voltage is significant when using the EHCS, because the node V_L+ is grounded, which results in a V_Lcm equal to half of the voltage drop across the load, degrading the signal to noise ratio of measurements.

(4)VLcm=VL++VL−2$${{V}_{Lcm}}\,=\frac{{{V}_{L+}}+{{V}_{L-}}}{2}$$

In order to eliminate common mode problems, the circuit must provide a differential output, yielding V_L-=-V_L+ This approach also doubles the compliance (see Eq. 2), suggesting that a differential approach is better suited to increase common mode signal rejection and load capability. Furthermore, high symmetrical output current sources are partially able to compensate the effects of the double layer [18].

The circuit in Fig. 2, based on [12] and called here EHCS-BRIDGE-1, uses a unitary gain inverter to obtain -V_out. To achieve differential balance, a resistor (r_trim) is placed in series with the load.

Fig.2

The value of r_trim must be set to mimic the voltage drop at “r”, forcing the voltage V_L+ to be equal to -V_L- Equation 5, adapted from Tucker [10], models V_L- in terms of V_out and V_in (see Fig. 1) considering the positive feedback current passing through R much lower than the output one. It can be seen that the voltage drop across the resistor “r” is approximately V_in, so the value of r_trim can be calculated once the output current is known.

(5)VL−≈Vout−Vin$${{V}_{L-}}\approx \,{{V}_{out}}-{{V}_{in}}$$

The EHCS-BRIDGE-1 can be simplified using a differential output amplifier to generate -V_out instead of an additional inverting amplifier [16], as it can be seen in Fig. 3. The appropriate value of r_trim is the same from EHCS-BRIDGE-1.

Fig.3

However, Eq. 5 is only an approximation, as the current passing through r varies with the load value (due to the feedback current increase), changing its voltage drop. Because r_trim remains the same, an unbalance is developed across the load. Thus, the common mode voltage and output swing are dependent on the load value. This shows a disadvantage of the topology, and will be further discussed later.

The unbalance caused by r_trim can be overcome by the topology shown in Fig. 4, based on [17]. The circuit uses a buffer at V_L- in series with an inverting amplifier to generate -V_L- at the voltage side of the load, so r_trim is not necessary.

Fig.4

However, an additional amplifier acting as a buffer is needed, to isolate the inverter and avoid loading, which increases complexity, noise and parasitic capacitance at the output.

Mirrored Group

The mirrored group consists of two circuits: the Mirrored Enhanced Howland Current Source (MEHCS) [11] (Fig. 5) and a proposed modification of this same circuit using differential amplifiers (MEHCS-DIF) (Fig. 6).

Fig.5

Fig.6

MEHCS is implemented with two opposite polarity EHCS connected in series. The principle is a symmetrical current generation (source and sink), and consequently inverse voltages at each side of the load.

The problem with the MEHCS is that the output current of each output of this current source is not exactly the same because of circuit mismatches and different input impedances [11]. The output current difference between the source and sink sees the output impedance of the current sources, creating high common mode voltage and reducing output swing.

The use of fully differential amplifiers allows the input voltage to be connected to the same input at both sides, minimizing the difference between input impedances. However, the possibility of circuit mismatches due to component tolerances and temperature drift remains.

It can be seen from the previously analysis that most solutions proposed in the literature to improve common mode and output swing needs multiple active devices and matched resistor networks, which results in increase of complexity and, in practice, unbalance problems.

Proposed Group

The proposed group of circuits uses differential amplifiers to create symmetrical current sources using only one active device. Three topologies are proposed: Quad feedback EHCS (QUAD), Crossed EHCS-DIF (DIF_C) and Modified EHCS-DIF (DIF_M). All circuits are inspired by EHCS-DIF and MEHCS.

The Quad-feedback EHCS uses one differential amplifier to create a mirrored EHCS. Comparing to the standard EHCS from Fig. 1, it can be seen that R₆ creates a second negative feedback and R₃ creates a second positive feedback, while r_x2 has the same function as r_x1.

Fig.7

To balance the feedbacks, the following considerations were made:

(6)rx1=rx2=rx$${{r}_{x1}}={{r}_{x2}}\,={{r}_{x}}$$(7)R1=R2=Rc$${{R}_{1}}={{R}_{2}}={{R}_{c}}$$(8)R4=R6=Rb$${{R}_{4}}={{R}_{6}}={{R}_{b}}$$(9)R3=R5=Ra$${{R}_{3}}={{R}_{5}}={{R}_{a}}$$

Considering an ideal case where:

(10)Vout′=−Vout$${{V}_{ou{t}'}}=-{{V}_{out}}$$(11)V+=V−$${{V}^{+}}={{V}^{-}}$$

Using the software wxMaxima to rearrange the node equations, it was obtained an equation of I_out as function of V_in, V_L- and V_L+; which is not showed in this work due to its excessive size. In order to simplify the equation, the following consideration was made:

(12)Rb=rx+Ra$${{R}_{b}}={{r}_{x}}+{{R}_{a}}$$

Then, an equation independent from the load is obtained.

(13)Iout=VinRb2Rcrx$${{I}_{out}}=\frac{{{V}_{in}}{{R}_{b}}}{2{{R}_{c}}{{r}_{x}}}$$

This equation considers an ideal op-amp, for a more accurate one it can be included the open loop gain (A_o) by changing Eq. 11 for Eq. 14.

(14)Vout=A0(V+−V−)$${{V}_{out}}={{A}_{0}}\left( {{V}^{+}}-{{V}^{-}} \right)$$

Now, the output current equation is given by Eq. 15.

(15)Iout=[rx2+(AO+1)Rarx+AORa2]Vin(Rc+Ra)rx2+[(2AO+2)RaRc+Ra2]rx$${{I}_{out}}=\frac{\left[ r_{x}^{2}+\left( {{A}_{O}}+1 \right){{R}_{a}}{{r}_{x}}+{{A}_{O}}R_{a}^{2} \right]{{V}_{in}}}{\left( {{R}_{c}}+{{R}_{a}} \right)r_{x}^{2}+\left[ \left( 2{{A}_{O}}+2 \right){{R}_{a}}{{R}_{c}}+R_{a}^{2} \right]{{r}_{x}}}$$

The output impedance equation (Eq. 16) is obtained by using the same node equations but grounding the input voltage.

(16)Zout=2rx[Ra(Rb+Rc(2+AO))+Rcrx](Ra+rx)(Rb+2Rc)$${{Z}_{out}}=\frac{2{{r}_{x}}\left[ {{R}_{a}}\left( {{R}_{b}}+{{R}_{c}}\left( 2+{{A}_{O}} \right) \right)+{{R}_{c}}{{r}_{x}} \right]}{\left( {{R}_{a}}+{{r}_{x}} \right)\left( {{R}_{b}}+2{{R}_{c}} \right)}$$

In further analysis, it can be seen that the purpose of the second negative feedback is to create an opposite V_out, which is not necessary since it is already done internally by the differential amplifier. Then R₆ can be eliminated from the circuit, leading to the EHCS-DIF_C from Fig. 8.

Fig.8

To balance the positive feedbacks, their resistors were equaled (Eq.17), while equations 6, 10 and 11 are also valid in this analysis:

(17)R3=R5$${{R}_{3}}={{R}_{5}}$$

Again, using the software wxMaxima, it was obtained an equation of I_out as function of V_in, V_L- and V_L+; which is not showed in this work due to its excessive size. Eq. 18 and 19 lead to an I_out independent from the load (Eq. 20):

(18)R4=rx+R3$${{R}_{4}}={{r}_{x}}+{{R}_{3}}$$(19)R2<<rx+R3$${{R}_{2}}<<{{r}_{x}}+{{R}_{3}}$$

From Eq. 19 it is assumed that the best case is R₂=0.

(20)Iout=(rx+R3+2R1)Vina−(rx+R3)VinbR1rx$${{I}_{out}}\,=\frac{\left( rx+{{R}_{3}}+2{{R}_{1}} \right){{V}_{i{{n}_{a}}}}-\left( rx+{{R}_{3}} \right){{V}_{i{{n}_{b}}}}}{{{R}_{1}}{{r}_{x}}}$$

The inputs VinaandVinb${{V}_{i{{n}_{a}}}}\,\text{and}\,{{V}_{i{{n}_{b}}}}$ sees different transconductances, then the DIF_C topology cannot be used with differential input, as shown in equation 20. However, it is not a problem when one input is used for signal and the other for offset compensation.

Considering the practical case of Eq. 14 instead of the ideal one (Eq. 11), the output current equation can be described as a function of A_o.

(21)Iout=(AoR3rx+AOR32+2AOR1R3)Vina−(rx2+(AO+1)rxR3+AOR32)Vinb(R3+R1)rx2+(R32+(AO+2)R1R3)rx$${{I}_{out}}=\frac{\left( {{A}_{o}}{{R}_{3}}rx+{{A}_{O}}R_{3}^{2}+2{{A}_{O}}{{R}_{1}}{{R}_{3}} \right){{V}_{i{{n}_{a}}}}-\left( r_{x}^{2}+\left( {{A}_{O}}+1 \right){{r}_{x}}{{R}_{3}}+{{A}_{O}}R_{3}^{2} \right){{V}_{i{{n}_{b}}}}}{\left( {{R}_{3}}+{{R}_{1}} \right)r_{x}^{2}+\left( R_{3}^{2}+\left( {{A}_{O}}+2 \right){{R}_{1}}{{R}_{3}} \right)rx}$$

Using the same node equations and grounding both inputs, it was obtained a simplified equation for the output impedance.

(22)Zout=rx3+(2AO+7)R3rx2+(2AO+6)R32rx3rx2+6R3rx+3R32$${{Z}_{out}}=\frac{r_{x}^{3}+\left( 2{{A}_{O}}+7 \right){{R}_{3}}r_{x}^{2}+\left( 2{{A}_{O}}+6 \right)R_{3}^{2}{{r}_{x}}}{3r_{x}^{2}+6{{R}_{3}}{{r}_{x}}+3R_{3}^{2}}$$

The third proposed topology is shown in Fig. 9 and is clearly an adaptation of EHCS-DIF, with only the insertion of R₅

Fig.9

To make the circuit independent from the load, the same resistors conditions of the EHCS are assumed, this is:

(23)R3=R4$${{R}_{3}}={{R}_{_{4}}}$$(24)R2=R4$${{R}_{2}}={{R}_{_{4}}}$$(25)R1=R4+r$${{R}_{1}}={{R}_{4}}+r$$

Then I_out is defined by Eq.1, the same equation for the EHCS output current. If it is considered that the open-loop gain of the op-amp is not infinite then Eq. 26 defines the output current, while the output impedance is described by equation Eq. 27.

(26)Iout=AOVin(AO+2)r$${{I}_{out}}=\frac{{{A}_{O}}{{V}_{in}}}{\left( {{A}_{O}}+2 \right)r}$$(27)Zout=rx3+(2Ao+7)R3rx2+(2Ao+6)R32rx3rx2+6R3rx+3R32$${{Z}_{out}}=\frac{r_{x}^{3}+\left( 2{{A}_{o}}+7 \right){{R}_{3}}r_{x}^{2}+\left( 2{{A}_{o}}+6 \right)R_{3}^{2}{{r}_{x}}}{3r_{x}^{2}+6{{R}_{3}}{{r}_{x}}+3R_{3}^{2}}$$

It can be seen that the output current follows the same equations as the EHCS. To find out the influence of the load on the value of r_trim and R₅, V_Lcm was modelled in terms of the circuit resistors and then equaled to zero. An equation of r_trim in terms of the others resistors was then obtained (Eq. 28).

(28)rtrim=2r2+Zloadr+4R3rZloadrR5+2r+2R3ZloadR5+4R3$${{r}_{trim}}=\frac{2{{r}^{2}}+{{Z}_{load}}r+4{{R}_{3}}r}{\frac{{{Z}_{load}}r}{{{R}_{5}}}+2r+\frac{2{{R}_{3}}{{Z}_{load}}}{{{R}_{5}}}+4{{R}_{3}}}$$

Considering R₅ infinite, consequently leading back to EHCS-DIF topology, it can be seen the dependence of r_trim on the load on Eq. 29.

(29)rtrim=(2r+Zload+4R3)r2r+4R3$${{r}_{trim}}=\frac{\left( 2r+{{Z}_{load}}+4{{R}_{3}} \right)r}{2r+4{{R}_{3}}}$$

If Z_load is equal to zero, then r_trim = r. Also, it can be seen that the higher the value of the resistor in the feedback, the less significant Z_load becomes.

In order to make the optimal r_trim independent on the load, according to Eq. 28, R₅ must be equal to Eq. 30.

(30)R5=r+2R3$${{R}_{5}}=r+2{{R}_{3}}$$

This resistor (R₅) mimics the resistance seen from V_L- to the ground trough R₁ and R₃ (see Fig. 9), consequently leading to V_L+ = V_L-.

Another important characteristic of a current source is the loading capability. In bioimpedance applications, the load impedance is unknown; so on the current source must tolerate the biggest range of loads as possible. The maximum load Z_{load_max} is determined by the operational amplifier output saturation (V_sat). Eq. 31 is valid for QUAD and DIF_C topologies, while Eq. 32 is valid for DIF_M.

(31)Vout=Ioutrx[1+Zload2rx(1+rxR3)]≤Vsat$${{V}_{out}}={{I}_{out}}{{r}_{x}}\left[ 1+\frac{{{Z}_{load}}}{2{{r}_{x}}}\left( 1+\frac{{{r}_{x}}}{{{R}_{3}}} \right) \right]\le {{V}_{sat}}$$(32)Vout=Ioutr[1+Zloadr(r+R3r+2R3)]≤Vsat$${{V}_{out}}={{I}_{out}}r\left[ 1+\frac{{{Z}_{load}}}{r}\left( \frac{r+{{R}_{3}}}{r+2{{R}_{3}}} \right) \right]\le {{V}_{sat}}$$

From Figs. 7 and 8 and Eq. 31 it can easily be observed that V_out depends on the voltage drop over the resistor r_x plus half of the voltage drop on the load (symmetrical source). So the smaller the value of r_x the bigger the value that Z_load can assume. However, a key factor is the value of R₃, once it divides the value of Z_load times r_x increasing the value of Z_{load_max} without changing the value of I_out. For example, if r_x = R₃ then Z_load is multiplied by 1, and the advantage of using a symmetrical output current source is lost.

The equation considers an ideal operational amplifier, thus the value of Z_{load_max} is the theoretical limit of the circuit capability for a given combination of resistors. The load range may be smaller in practical applications. Furthermore, R₃ can be chosen to improve I_out, Z_out and Z_{load_max} without changing the value of I_out.

According to the equations presented in the Theory Section, the value of R₃ can lead to different output impedance, swing and common mode for the same transconductance. Also, this resistor is a positive feedback component, which can interact with the input capacitance of the amplifier and lead to instability and overshoot problems. Therefore, three values of resistors were simulated for the three proposed circuits. The values where chosen to match the available resistors with 1% tolerance.

The simulated I_out and Z_out can be seen in Figs. 10 and 11, respectively. All the three sources were designed to obtain transconductance equal to 1 mA/V. The negative feedback was set to unity, so r_x must be equal to 500 Ω in the case of QUAD topology and equal to 1 kΩ in the case of DIF_C and DIF_M topologies. To evaluate the significance of using r_x=R₃ in Eq. 31 and 32, the first value of R₃ is not the same for all circuits. The second and third values are equal for a straight comparison. The input voltage was 1 V_p for all topologies and the load was 1 kΩ.

Fig.10

All circuits showed a peak at high frequencies (> 10 MHz) when a R₃ bigger than 4.7 kΩ is used. DIF_C was the topology with the smallest peaks, while DIF_M was the one with biggest ones. On the other hand, DIF_M showed the largest flat bandwidth.

Fig.11

QUAD and DIF_M showed an increase of output impedance when R₃ was increased, the opposite happened to DIF_C. All circuits showed values close to 1 MΩ for frequencies lower than 100 kHz when R₃ is equal to 4.7 kΩ or 10 kΩ. It must be said that the behavior of DIF_C in simulations using AD8132 does not match the equations. Substituting this OPAMP to an ideal one with the same open loop gain, simulation and equation results converged. By simulations, we verified that a mismatch between the two outputs of the AD8132 (not modeled by the equations) was the cause of this behavior.

In order to evaluate the influence of R₃ in Z_{load_max} a simulation was performed. The load was swept from 0.1 kΩ to 10.1 kΩ in step of 500 Ω, Table I shows the results. The operational amplifier is powered with ±5 V, and V_sat of the SPICE model used is ±3.8 V.

From Table 1 it can be concluded that Quad topology can drive higher loads without saturating. This can be explained by the fact that r_x in the quad topology is half of the value in the DIF_C and DIF_M topology, thus reducing the voltage drop in this resistor. It can be seen that, in this case, the DIF_M source has less dependence on the value of R₃ then the other two sources, but its maximum load was the same as DIF_C in the simulations. It is important to notice that the deviations between calculated and simulated results are very low, meaning that the proposed mathematical equations are capable of predicting the maximum supported load.

Finally, in order to choose the value of R₃ to compare the three sources, one can choose between using the same value in all sources and using the values that result in similar and comparable behavior. In this work, the latter option was used, considering that it gives a fairer comparison in terms of common mode voltage. To put all proposed topologies in the same working conditions, a value of R₃ was defined for each one of the circuits. The parameters used to define it were the high frequency peak in the output current (considering 1 kΩ load), the low frequency output impedance and maximum load. Among the tested values of R₃, the ones that lead to similar response are 10 kΩ for DIF_C and 4.7 kΩ for QUAD and DIF_M.

To validate I_out and Z_out equations obtained for each one of the proposed circuits, they are compared to simulations, shown in Fig. 12. No variation of R₃ is done for the equations, because it is assumed that no further information would be obtained. The results can be seen in Figs. 12 and 13. The input was 1 V_p for QUAD, DIF_C and DIF_M using the inverting input, while it is used 0.333 V_p for DIF_C using the non-inventing input.

Fig.12

Fig.13

Fig. 12 shows that the simulated and equated values for I_out are very similar up to 10 MHz, where the errors begin to increase. The output impedance have similar behavior (see Fig. 13), however the frequency where the error begins to increase is approximately 100 kHz, and it can be seen that the simulated Z_out are a little higher than the equated ones in the flat band (lower frequencies). The differences in high frequency behavior can be explained by the fact that the OPAMP input impedance is not modeled in the equations.

Once the proposed circuits are characterized, comparisons of V_Lcm between all topologies can be made. All circuits were designed to deliver an output current of 1 mA_p for an input voltage of 1 V_p. All simulated frequency analyses were done from 100 Hz to 100 MHz, while in the time analysis it was set to 1 MHz. The load was fixed at 1 kΩ, except for load dependence experiments where four loads were used: 0.1 kΩ, 1.6 kΩ, 3.1 kΩ and 4.6 kΩ.

The results are shown in graphs containing the circuits of the same group (non-differential, mirrored, proposed) and then they are discussed against each other. The frequency response of V_Lcm for the circuits in the non-differential group is shown in Fig. 14. The resistor r_trim is equal to r (1 kΩ) for EHCS-DIF and BRIDGE-1.

Fig.14

In Fig. 14, the EHCS had the highest V_Lcm, 0.5 V, which is half of the load voltage as expected. EHCS-DIF and BRIDGE-1 showed responses of about 200 mV and 70 mV, respectively. BRIDGE-2 had an increase on common mode voltage after 100 kHz, but remained the smallest V_Lcm until 30 MHz. The waveform of V_Lcm for the non-differential group is shown in Fig. 15, including the DC component.

Fig.15

It can be seen in Fig. 15 that the AC values match the ones shown in Fig. 14 at 1 MHz, and that the DC component of V_Lcm is almost null compared to the AC component. As the output current is the same for all the circuits, BRIDGE-2 presented the best common mode rejection of the non-differential group. However, note that the reduction in common mode voltage is at cost of complexity, as the number of active components increases (BRIDGE-1 and BRIDGE-2 have two and three OPAMPS, respectively).

Although r_trim can be changed to mimic the voltage drop at r, this voltage drop is not constant for different loads. A load variation was simulated to study how it affects V_Lcm.

In Fig. 16, it can be seen that all circuits showed a large variation of V_Lcm for the step of 0.1 kΩ to 1.6 kΩ and small variations for the others load steps. BRIDGE-2 showed values smaller than 10 mV for all loads until 100 kHz, but for higher frequencies it raises to close to 1 V. With exception of 100 Ω, EHCS-DIF and BRIDGE-1 show almost constant values, around 1 V and 0.1 V, respectively.

Fig.16

In Fig. 17, the AC common mode analysis is shown for the other two groups (Mirrored and Proposed group). MEHCS-DIF was excluded because the result was exactly the same as for MEHCS.

Fig.17

In Fig. 17, it is shown that the proposed DIF_C topology has the lowest V_Lcm; at the flat zone it is equal to 0.4 mV, rising to around 20 mV in high frequencies. QUAD and MEHCS showed constant V_Lcm of 16.5 and 120 mV respectively, along all frequencies. DIF_M showed slightly higher values than DIF_C, about 3 mV. In Fig. 18, the time analysis is shown for these two groups.

Fig.18

In Fig. 18 b) it can be seen that all proposed topologies do not show significant DC component, in contrast with the mirrored circuits, Fig. 18 a) with DC value around ± 800 mV. The DC component of the MEHCS source is a consequence of the offset signal of the two amplifiers used in the configuration, which creates a common mode output current that flows through the output impedance of each EHCS section. The AC amplitudes agree with the values seen in Fig. 17 at 1 MHz.

To analyze the effect of a resistor mismatch, Fig. 19 shows the common mode frequency response of both mirrored and proposed group when a ±1% error is applied to the resistors r and r_x.

Fig.19

In figure 19, DIF_M shows the smallest V_Lcm in most frequencies, from 6 to 90 mV, while DIF_C varies from 10 to 20 mV. Quad is almost constant at 11 mV, while MEHCS falls from 4600 to 130 mV. This shows that the MEHCS circuit is very sensitive to resistor mismatch in terms of common mode signal, whereas the DIF_M source shows a robust behavior. Furthermore, the common mode voltage of the mismatched MEHCS was almost one order of magnitude larger than the other circuits, which shows that this source is much less effective in common mode reduction in practical situations. Fig. 20 presents the time analysis for both groups when r and r_x are unmatched with ±1%.

Fig.20

It can be seen that even with unmatched sides, the proposed topologies has not shown any significant DC component, while for MEHCS and MEHCS-DIF it is maintained at ± 800 mV. This DC signal is usually not desirable in bioimpedance applications, as it decreases output swing and requires the use of series blocking capacitors to isolate the load.

Fig. 21 shows the common mode response using four different loads (0.1 kΩ, 1.6 kΩ, 3.2 kΩ and 4.6 kΩ) for DIF_C, QUAD and DIF_M.

Fig.21

In Fig. 21 it can be seen that both QUAD and DIF_C showed V_Lcm around 10 mV for all four loads. On the other hand DIF_M showed higher dependence on the load; yet, all values of V_Lcm are smaller than the ones obtained with QUAD and DIF_C. This response, in contrast with the ones presented in Fig. 16, shows that the circuits of the proposed group have a common mode response much less dependent on the load than the ones from the non-differential group, suggesting that the proposed group is more suitable to applications that requires low common mode voltage with large load ranges.

In order to analyze the behavior of the common mode voltage when submitted to random variations in the resistors values (due to fabrication tolerance), a Monte Carlo simulation was performed (1000 rounds) in the mirrored and proposed groups, considering all the resistors in the circuits with 1% tolerance (Gaussian distribution of resistor values). The results are shown on the histograms of Fig. 22. The common mode values presented in this case were the maximum absolute value in the range of 100 Hz to 1 MHz. It can be seen that the mean value of the proposed group common-mode voltage is similar to the ones found in Fig. 19, and even the worst case is kept below 30 mV using relatively common resistors. On the other hand, the mirrored circuit showed a significantly larger variation, with 15% of the values outside the linear range of the operational amplifier, which is 5 V. The histograms of Fig. 22 show values above 5 V because the AC simulation of PSPICE does not consider saturation limits of the amplifier. This means that the mirrored group can easily saturate with random resistor variations caused by tolerance.

Fig. 22

Once the simulations showed that the proposed circuits are able to reduce the common mode voltage and enhance output swing, experimental data with practical circuits was collected. The proposed group circuits were implemented with resistor values to match the simulations (1% tolerance), using AD8132 differential amplifiers and double-layer boards to accommodate a ground plane. The resistors used as loads were measured previously to the tests, resulting in the values 100, 995, 2492 and 4692 Ω. Due to parasitic components and limitation of the instruments, the experimental data was limited to 1 MHz.

In Fig. 23, the output current of the proposed circuits for four different loads is shown.

Fig.23

The DIF_M showed the smallest dependence on the load, while DIF_C showed the largest. All topologies showed a decrease in the output current at 1 MHz for a load of 4.7 kΩ, evidencing the influence of a high frequency pole dependent on the load value. In Fig. 24, the output current phase can be seen.

Fig.24

The increasing deviation in high frequencies suggests that the pole of the practical circuit is slightly lower that the simulated, which was expected due to parasitic components. The simulated output current phase of QUAD and DIF_M are overlapped, while DIF_C showed a slightly bigger decrease close to 1 MHz.

From the magnitude variation of output current using different loads, the output impedance can be obtained, and the results are shown in Fig. 25. They are obtained by an equation that considers that the output impedance is in parallel with the load, the load voltage and the load impedance are necessary.

Fig.25

Where V_L2 is the measured load voltage for the biggest load (R_L2 = 4.7 kΩ) and V_L1 is the load voltage for the smallest load (R_L1 = 100 Ω).

The DIF_M topology showed the highest output impedance, near 1 MΩ from 100 Hz to 100 kHz, while DIF_C and QUAD showed values considerably smaller, 300 kΩ and 400 kΩ in the same frequency region.

The output common mode voltage was obtained using Eq. 4, and is shown in Fig. 26. The measurements were divided by the input voltage, to compensate for small variations of the voltage generator in the frequency range.

Fig.26

The common mode voltages of DIF_M and DIF_C are both smaller than 8 mV, while QUAD showed higher maximum value, 23 mV (in 100 Hz). Although the magnitude values are similar to simulations (see Fig. 17 and 19), the behavior of the curves are different from the expected. One possible explanation is the limited precision of the instrumentation, as the common mode value are much lower than the differential signal measured. However, if this signal is treated as undesirable noise in an application, only the maximum range of values that the common mode voltage can assume in the frequency band is important, and not its dependence on the frequency.

A complementary characteristic that can be obtained is the CMRR. This parameter indicates the relation between the differential load voltage, the signal of interest in bioimpedance applications, and the output common mode voltage, undesirable signal that can generate artifacts and noise in a measurement. These results can be seen in Fig. 27.

Fig.27

From the results, one can conclude that the CMRR is highly dependent on the load impedance in all circuits tested. This behavior was expected from the previous results, as the load differential voltage increases linearly with the load, while the load common mode voltage dependence on the load is more complex (see Fig. 26). QUAD showed the smallest CMRR while DIF_C showed the highest.

It is important to notice that the DIF_M circuit showed the highest CMRR using the lowest load, which is desirable considering that common mode problems are significant with small differential signals.

Bioimpedances are usually in the range of 10 to 1000 Ω, depending on the application, so using DIF_C or DIF_M topologies could enhance the CMRR up to 60 dB when compared to EHCS (CMRR ≈ 6 dB)

The other property of the Howland current source that is being investigated is the output swing; the measured ones are shown in Table 2.

QUAD showed the highest Z_{load_max}, mainly due to r_x being half of the ones used in the other topologies, while DIF_C showed a small enhancement in comparison to DIF_M.

Furthermore, the topologies DIF_C and QUAD have both outputs working in high impedance, while DIF_M have one output at high impedance and the other one in low impedance. It could not be found in the literature whether this characteristic has any practical meaning in bioimpedance measurements.

In this work, it has been found that from the Howland current sources topologies found in literature, the one that showed best common mode rejection was the BRIDGE-2, but this circuit requires three operational amplifiers. Three new circuits are proposed, all able to reach BRIDGE-2 common mode rejection using only one operational amplifier. All three proposed circuits showed close results, the intended application will determine which one is better.