Soft Fault Clustering in Analog Electronic Circuits with the Use of Self Organizing Neural Network
The paper presents a methodology for parametric fault clustering in analog electronic circuits with the use of a self-organizing artificial neural network. The method proposed here allows fast and efficient circuit diagnosis on the basis of time and/or frequency response which may lead to higher production yield. A self-organizing map (SOM) has been applied in order to cluster all circuit states into possible separate groups. So, it works as a feature selector and classifier. SOM can be fed by raw data (data comes from the time or frequency response) or some pre-processing is done at first. The author proposes conversion of a circuit response with the use of e.g. gradient and differentiation. The main goal of the SOM is to distribute all single faults on a two-dimensional map without state overlapping. The method is aimed for the development stage because the tolerances of elements are not taken into account, however single but parametric faults are considered. Efficiency analyses of fault clustering have been made on several examples e.g. a Sallen-Key BPF and an ECG amplifier. Testing procedure is performed in time and frequency domains for the Sallen-Key BPF with limited number of test points i.e. it is assumed that only input and output pins are available. A similar procedure has been applied to a real ECG amplifier in the frequency domain. Results prove a high efficiency in acceptable time which makes the method very convenient (easy and quick) as a first test in the development stage.
Bushnell, L., Vishwani, D., Agrawal. (2002). Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits. Kluwer Academic Publishers, ISBN: 0-306-47040-3.
Huertas, I. L. (1993). Test and design for testability of analog and mixed-signal integrated circuits: theoretical basis and pragmatical approaches. Proc. ECCTD Conf., 75-156.
Huertas, JL. (2004). Test and Design-for-Testability in Mixed-Signal Integrated Circuits, Kluwer Academic Publishers, Boston.
Milor, L. S. (1998). A Tutorial Introduction to Research on Analog and Mixed-Signal Circuit Testing. IEEE Trans. on Circuits and Systems-II, 45(10), 1389-1407.
Lin, P. M., Elcherif, Y. S. (1998). Computational Approaches to Fault Dictionary, Analog Methods for Computer-Aided Circuit Analysis and Diagnosis. M. Dekker.
Richardson, A., Lechner, A., Olbricht, T. (1998). Design for Testability for Mixed Signal & Analogue Designs - From Layout to System. Proc. Int. Conf. on Electronics, Circuits and Systems, 425-432.
Golonek, T., Rutkowski, J. (2007). Genetic-Algorithm-Based Method for Optimal Analog Test Points Selection. IEEE Trans. on Cir. and Syst.-II., 54(2), 117-121.
Prasad, V. C., Babu, N. S. C. (2000). Selection of test nodes for analog fault diagnosis in dictionary approach. IEEE Trans. Instrum. Meas., 49(6), 1289-1297.
Pułka, A. (2011). Two Heuristic Algorithms for Test Point Selection in Analog Circuits Diagnoses. Metrology and Measurement Systems, 18(1), 115-128.
Starzyk, J. A., Liu, D., Liu, Zhi-H., Nelson, D. E., Rutkowski, J. (2004). Entropy-Based Optimum Test Points Selection for Analog Fault Dictionary Techniques. IEEE Trans. on Instrumentation and Measurement, 53(3), 754-761.
Grasso, F. Luchetta, A., Manetti, S., Piccirilla, M. C. (December 2007). A Method for the Automatic Selection of Test Frequencies in Analog Fault Diagnosis. IEEE Trans. on Instr. and Measur., 56(6).
Grzechca, D., Golonek, T., Rutkowski, J. (2007). Simulated Annealing with Fuzzy Fitness Function for Test Frequencies Selection. IEEE Conference on Fuzzy Systems, FUZZ-IEEE, Imperial College London, UK.
Sen, N., Saeks, R. (1979). Fault Diagnosis for Linear Systems Via Multifrequency Measurements. IEEE Trans. On Circuits and Systems, 26, 457-465.
Chruszczyk, Ł., Grzechca, D., Rutkowski, J. (September 2007). Finding of optimal excitation signal for testing of analog electronic circuits. Bulletin of the Polish Academy of Science, 55(3), 273-280.
Golonek, T., Grzechca, D., Rutkowski, J. (September 14-17, 2008). Optimization of PWL Analog testing Excitation by Means of Genetic Algorithm. Int. Conference on Signals and Electronic Systems, ICSES 2008, 541-548.
Hochwald, W., Bastian, J. D. (1979). A DC dictionary approach for analog fault dictionary determination. IEEE Trans. on Circuits and Systems, 26, 523-529.
Bilski, P., Wojciechowski, M. (2007). Automated Diagnostics of Analog Systems Using Fuzzy Logic Approach. IEEE Trans. on Inst. and Measur., 56(6).
Grzechca, D., Golonek, T., Rutkowski, J. (2006). Analog Fault AC Dictionary Creation - The Fuzzy Set Approach. ISCAS 2006, IEEE International Symposium on Circuits and Systems, Kos, Greece, 5744-5747.
Wang, P., Yang, S. (2005). A New Diagnosis Approach for Handling Tolerance in Analog and Mixed-Signal Circuits by Using Fuzzy Math. IEEE Trans. on Circuits and Systems-I: Regular Papers, 53(10).
Zhou, L., Shi, Y., Tang, J., Li, Y. (2009). Soft Fault Diagnosis in Analog Circuit Based on Fuzzy and Direction Vector. Metrol. Meas. Syst., 16(1), 61-75.
Muhammad, H. R. (2002). Spice for Circuits and Electronics Using Pspice., 2nd ed., Prentice-Hall, New York.
Tadeusiewicz, M., Hałgas, S., Korzybski, M. (2011). Multiple catastrophic fault diagnosis of analog circuits considering the component tolerances. International Journal of Circuit Theory and Applications, published online: March 29, 2011 | DOI: 10.1002/cta.770.
Toczek, W. (2004). Analog fault signature based on sigma-delta modulation and oscillation-test methodology. Metrology and Measurement Systems, 11(4), 363-375.
Kuczyński, A., Ossowski, M. (2009). Analog circuits diagnosis using discrete wavelet transform of supply current. Metrol. Meas. Syst., 16(1), 77-85.
Grzechca, D., Chruszczyk, L. (2007). Wavelet - Neural Network to Analog Paramteric Fault Circuit Location. 13th International Mixed Signals Testing Workshop and 3rd GHz/Gbps Test Workshop, IMSTW>W 2007, Povoa de Varzim, Portugal, 2-6.
Aminian, F., Modular, A. (2007). Fault-Diagnostic System for Analog Electronic Circuit Using Neural Networks With Wavelet Transform as a Preprocessor. IEEE Trans. on Inst. and Measur., 56(5).
Jantos, P., Grzechca, D., Rutkowski, J. (2009). Global Parametric Faults identification in analog electronic circuits. Metrol. Meas. Syst., 16(3), 391-402.
Czaja, Z., Zielonko, R. (2004). On fault diagnosis of analogue electronic circuits based on transformations in multidimensional spaces. Measurement, 35(3), 293-301.
Tadeusiewicz, M., Hałgas, S. (2006). An algorithm for multiple fault diagnosis in analogue circuits. International Journal of Circuit Theory and Applications, J. Wiley & Sons. Ltd., (34), 607-615.
Balen, T. R., Calvano, J. V., Lubaszewski, M. S., Renovell, M. (2006). Functional Test of Field Programmable Analog Arrays. Proc. of the 24th IEEE VLSI Test Symposium.
Das, S. R., Zakizadeh, J., Biswas, S., Assaf, M. H., Nayak, A. R., Petriu, E. M., Jone, W.-B., Sahinoglu, M. (2007). Testing Analog and Mixed-Signal Circuits With Built-In Hardware - A New Approach. IEEE Trans. On Inst. and Measur., 56(3).
Toczek, W., Kowalewski, M. (2009). Built-in test scheme for detection, classification and evaluation of nonlinearities. Metrol. Meas. Syst., 16(1), 47-61.
Grzechca, D., Rutkowski, J. (2009). Fault Diagnosis in Analog Electronic Circuit - the SVM approach. Metrology and Measurement Systems, 16(4), 583-598.
Rutkowski, J. (1994). A two stage neural network DC fault dictionary. Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on, 6, 299-302.
Grzechca, D., Rutkowski, J., Golonek, T. (2010). PCA application to frequency reduction for fault diagnosis in analog and mixed electronic circuit. Proc. of 2010 IEEE Int. Sym. on Circuits and Systems (ISCAS), Paris, France, 1919-1922.
Somayajula, S. A. S.; Sanchez-Sinencio, E.; Pineda de Gyvez, J. (1996). Analog fault diagnosis based on ramping power supply current signature clusters. Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on, 43(10), 703-712.
Somayajula, S. S.; Sanchez-Sinencio, E.; Pineda de Gyvez, J. (1993). Analog fault diagnosis: a fault clustering approach. European Test Conference, 1993. Proceedings of ETC 93., Third, 108-115.
Collins, P., Yu, S., Eckersall, K. R., Jervis, B. W., Bell, I. M., Taylor, G. E. (1994). Application of Kohonen and supervised forced organisation maps to fault diagnosis in CMOS opamps. Electronics Letters, 30(22), 1846-1847.
Osowski, S., Siwek, K. (1998). Self-organizing neural network for fault location in electrical circuits. Electronics, Circuits and Systems, 1998 IEEE International Conference on, 2, 265-268.
Grzechca, D. (2011). Group of parametric failures in the amplifier with the use of ECG self-organizing neural network. The National Electronics Conference, 896-901. (in Polish)
Kohonen, T. (2000). Self Organizing Map. Springer.
Kohonen, T. (1988), Self Organization and Associative Memory, Springer Verlag.
Mathworks, Self Organizing Map Toolbox.
Mehotra, K., Mohan, C. K., Ranka, S. (1997). Elements of Artificial Neural Networks. MIT Press, 187-202.
Duch, W., Korbicz, J., Rutkowski, L., Tadeusiewicz, R. (2000). Neural networks, biocybernetics and biomedical engineering. Academic publishing house EXIT. (in Polish)
Kugelstadt, T. (2005). Getting the most out of your instrumentation amplifier design. Analog Applications Journal, (4), Analog and Mixed Signal Products, Texas Instruments Incorporated.