Soft Fault Clustering in Analog Electronic Circuits with the Use of Self Organizing Neural Network

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Soft Fault Clustering in Analog Electronic Circuits with the Use of Self Organizing Neural Network

The paper presents a methodology for parametric fault clustering in analog electronic circuits with the use of a self-organizing artificial neural network. The method proposed here allows fast and efficient circuit diagnosis on the basis of time and/or frequency response which may lead to higher production yield. A self-organizing map (SOM) has been applied in order to cluster all circuit states into possible separate groups. So, it works as a feature selector and classifier. SOM can be fed by raw data (data comes from the time or frequency response) or some pre-processing is done at first. The author proposes conversion of a circuit response with the use of e.g. gradient and differentiation. The main goal of the SOM is to distribute all single faults on a two-dimensional map without state overlapping. The method is aimed for the development stage because the tolerances of elements are not taken into account, however single but parametric faults are considered. Efficiency analyses of fault clustering have been made on several examples e.g. a Sallen-Key BPF and an ECG amplifier. Testing procedure is performed in time and frequency domains for the Sallen-Key BPF with limited number of test points i.e. it is assumed that only input and output pins are available. A similar procedure has been applied to a real ECG amplifier in the frequency domain. Results prove a high efficiency in acceptable time which makes the method very convenient (easy and quick) as a first test in the development stage.

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Metrology and Measurement Systems

The Journal of Committee on Metrology and Scientific Instrumentation of Polish Academy of Sciences

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IMPACT FACTOR 2016: 1.598

CiteScore 2016: 1.58

SCImago Journal Rank (SJR) 2016: 0.460
Source Normalized Impact per Paper (SNIP) 2016: 1.228

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