Fractional analog scheme for efficient stabilization of a synchronous buck converter

This paper presents the design and control of power electronic synchronous buck converter. Even though a synchronous buck converter is more popular and more widely available, it is not always efficient as nonsynchronous. Firstly, the inputoutput linearization from the state space averaging of the converter is studied, after which a small AC signal analysis is introduced to obtain the dynamic transfer function. All the parameters of the converter are calculated based on the output voltage, current ripples as well as the input voltage. For robustness, the controller is implemented by comparing the response of integer order with non-integer (fractional) order controller, simply known as fractional order controller (FOC). The fractional order derivative is implemented from the Oustaloup approximation and the controller parameters are being tuned using Nelder Mead approximation bases on a system model. It is shown that the FOC performance is comparatively better in presence of the load disturbances and parameter variations. The experimental study with the real-time fractional PI is possible to make for a stand-alone embedded application using FPAA. The proposed technique does not require any digitization of the signal, so it can be easy to implement with improved performance. The effectiveness of the analog controller is discussed, giving some future directions to adopt the new fractional controller.