This paper presents techniques introduced to minimize both power and silicon area of the multichannel integrated recording circuits dedicated to biomedical experiments. The proposed methods were employed in multichannel integrated circuit fabricated in CMOS 180nm process and were validated with the use of a wide range of measurements. The results show that both a single recording channel and correction blocks occupy about 0.061 mm2 of the area and consume only 8.5 μW of power. The input referred noise is equal to 4.6 μVRMS. With the use of additional digital circuitry, each of the recording channels may be independently configured. The lower cut-off frequency may be set within the range of 0.1 Hz–700 Hz, while the upper cut-off frequency, depending on the recording mode chosen, can be set either to 3 kHz/13 kHz or may be tuned in the 2 Hz–400 Hz range. The described methods were introduced in the 64-channel integrated circuit. The key aspect of the proposed design is the fact that proposed techniques do not limit functionality of the system and do not deteriorate its overall parameters.