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M. Melosik, P. Sniatala and W. Marszalek

Abstract

The paper deals with the security problems in chaotic-based cryptography. In particular, the 0–1 test for chaos is used to detect hardware Trojans in electronic circuits – generators of chaotic bit sequences. The proposed method of detecting hardware Trojans is based on analyzing the original bit sequences through the 0–1 test yielding a simple result, either a number close to 1, when the examined bit sequence is chaotic, or a number close to 0, when the sequence is non-chaotic. A complementary result is a graph of translation variables qc and pc which form a basis of the 0–1 test. The method does not require any extra corrections and can be applied to relatively short sequences of bits. This makes the method quite attractive as the security problems are dealt with at the chaotic generator level, with no need to apply any extractors of randomness. The method is illustrated by numerical examples of simulated Trojans in chaotic bit generators based on the analog Lindberg circuit as well as a discrete system based on the logistic map.

Open access

M. Melosik and W. Marszalek

Abstract

In this paper we discuss in detail the resonance and oversampling features of the 0/1 test for chaos in continuous systems and propose methods to avoid those undesired features. Our method is based on certain frequency properties of the 0/1 test. When reconstructing the phase space, our approach is compared with the first minimum of the mutual information method. Several numerical results for typical chaotic systems (including memristive circuits) are included.

Open access

W. Jendernalik, G. Blakiewicz, A. Handkiewicz and M. Melosik

Abstract

In this paper a survey of analog application specific integrated circuits (ASICs) for low-level image processing, called vision chips, is presented. Due to the specific requirements, the vision chips are designed using different architectures best suited to their functions. The main types of the vision chip architectures and their properties are presented and characterized on selected examples of prototype integrated circuits (ICs) fabricated in complementary metal oxide semiconductor (CMOS) technologies. While discussing the vision chip realizations the importance of low-cost, low-power solutions is highlighted, which are increasingly being used in intelligent consumer equipment. Thanks to the great development of the automated design environments and fabrication methods, new, so far unknown applications of the vision chips become possible, as for example disposable endoscopy capsules for photographing the human gastrointestinal tract for the purposes of medical diagnosis.

Open access

P. Katarzynski, M. Melosik and A. Handkiewicz

Abstract

The paper presents the idea of software suite integrating the tools supporting the analog filter design. It uses the prototype circuits that are composed of gyrators and capacitors. The essential, behavioral parameters are characterised for the filtering structures. The basic assumptions formulated before the implementation are also mentioned. The structure of the software suite is discussed, its functional properties and the implementation issues are mentioned. The resulting software brings the automation of designing SISO filters as well as the filter pairs. In the proposed solution the VHDL-AMS language is assumed as the formal method of hardware description.